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Fairness and Protection Behavior of Resilient Packet Ring Nodes Using Network Processors.pdf

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Fairness and Protection Behavior of Resilient Packet Ring Nodes Using Network Processors

Fairness and Protection Behavior of Resilient Packet Ring Nodes Using Network Processors Andreas Kirst?dter 1 , Axel Hof 1 , Walter Meyer 2 , Erwin Wolf 2 1Siemens AG, Corporate Technology Information and Communications Otto-Hahn-Ring 6 81730 München, Germany {Andreas.Kirstaedter, Axel.Hof}@ 2Siemens AG, ICN Hofmannstr. 51 81379 München, Germany {Walter.Meyer, Erwin.Wolf}@ Abstract. The Resilient Packet Ring IEEE 802.17 is an evolving standard for the construction of Local and Metropolitan Area Networks. The RPR protocol scales to the demands of future packet networks and includes sophisticated re- silience mechanisms that allow the reduction of equipment costs. Network processors are a new opportunity for the implementation of network nodes of- fering a high flexibility and a reduced time to markets. This paper describes the implementation of a Resilient Packet Ring line card for a SDH/Sonet add-drop- multiplexer using the Motorola C-5 network processor. We show the novel sys- tem architecture of the ring node influenced by the use of the network proces- sor. System simulations and field-trial measurements verify the performance of the implemented protection and fairness mechanisms. Even with the usage of a protection steering mechanism implemented on flexible network processor hardware we were able to achieve reconfiguration times well below 50 milli- seconds. 1. Introduction The Resilient Packet Ring (RPR) is a draft standard to transport data traffic over ring- based media with link data rates scalable up to many gigabits per second in Local or Metropolitan Area Networks. The RPR standardization (IEEE 802.17) working group of the Institute of Electrical and Electronic Engineers (IEEE) started to work on the specification in December 2000 with the intention to create a new Media Access Con- trol layer for RPR. Two counter-rotating buffer-insertion rings build up an RPR [1,2], as shown in Figure 1. Adjacent nodes are interconnected vi