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. Transition Fault Model. Transition Fault Simulation.pdf

. Transition Fault Model. Transition Fault Simulation.pdf

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. Transition Fault Model. Transition Fault Simulation

1Transition Fault Simulation Yuxin Wang yxwang@ee.ualberta.ca Apr. 3, 2000 Outline ? Introduction ? Transition Fault Model ? Transition Fault Simulation ? Conclusion ? Future work ? References 2Introduction ? Signal transitions in the circuits 0--1 0 1 Introduction (con’d) ? Two types of faults that affect signal transitions – CMOS open transistor faults ? prevent signal transitions – Delay faults ? modify the timing of signal transitions 3Introduction (con’d) ? Sources and types of delay defects at the silicon level can be modeled as delay faults – resistive gate-oxide shorts(a source-to-drain transistor short) – open wire traces that support tunneling current – open and plugged vias – insufficient transistor doping – extra metal capacitive loading on wire traces – …... Introduction (con’d) ? Delay Fault Models – used to characterize the timing of the manufactured chip – added delays to net, nodes, wires, gates and other circuit elements 4Introduction (con’d) ? DC Fault Models ? AC Fault Models – describe the fault behavior of the circuit independent of any timing requirements – i.g. gate-level single stuck-at fault model – describe the fault behavior of the circuit taking into account of timing – i.g. gate-level transition delay and path delay fault Introduction(con’d) ? Types of Delay Faults – Transition Fault ? slow-to-rise or slow-to-fall – Gate Delay Fault ? delay fault is lumped at one gate in the circuit – Path Delay Fault ? delay fault along one path exceeds a specified limit 5Introduction(con’d) ? Delay Testing – ensure the design meets the desired performance specifications – detect timing defects Introduction (con’d) ? Delay testing for gate array chips has been viewed as highly expensive because of – test generation and fault simulation time – the amount of data required at the tester – the test application time overhead 6Introduction(con’d) ? Delay testing strategy – depend on ? the types of the circuits ? the speed of the testing equipment Transition

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