Altera交织解交织IP使用说明书.pdf

Symbol Interleaver/De-Interleaver MegaCore Function User Guide September 1999 Symbol Interleaver/De-Interleaver MegaCore Function User Guide, September 1999 A-UG-INTERLEAVER-01 ACCESS, Altera, AMPP, APEX, APEX 20K, Atlas, FLEX, FLEX 10K, FLEX 10KA, FLEX 10KE, FLEX 6000, FLEX 6000A, MAX, MAX+PLUS, MAX+PLUS II, MegaCore, MultiCore, MultiVolt, NativeLink, OpenCore, Quartus, System-on-a-Programmable-Chip, and specific device designations are trademarks and/or service marks of Altera Corporation in the United States and other countries. Product design elements and mnemonics used by Altera Corporation are protected by copyright and/or trademark laws. Altera Corporation acknowledges the trademarks of other organizations for their respective products or services mentioned in this document, including the following: Verilog is a registered trademark of Cadence Design Systems, Incorporated. Microsoft is a registered trademark and Windows is a trademark of Microsoft Corporation. Altera reserves the right to make changes, without notice, in the devices or the device specifications identified in this document. Altera advises its customers to obtain the latest version of device specifications to verify, before placing orders, that the information being relied upon by the customer is current. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty. Testing and other quality control techniques are used to the extent Altera deems such testing necessary to support this warranty. Unless mandated by government requirements, specific testing of all parameters of each device is not necessarily performed. In the absence of written agreement to the contrary, Altera assumes no liability for Altera applications assistance, customer’s product design, or infringement of patents or copyrights of third parties by or arising from use of semiconductor devices described herein. Nor does Altera warrant or represent any paten