DRV8840EVM;DRV8842EVM;中文规格书,Datasheet资料.pdf

Users Guide SLVU410–April 2011 CPG005_DRV88xx Evaluation Modules This document is provided as a supplement to the DRV8840 and DRV8842 datasheets. It details the hardware implementation of the CPG005_DRV88xxEVM Customer Evaluation Module (EVM). On this document, DRV88xx will be used interchangeably to refer to any of the aforementioned devices. Contents 1 Block Diagram 2 1.1 Power Connectors 2 1.2 Test Stakes 2 1.3 Jumpers 2 1.4 Motor Outputs 3 2 Installing Drivers And Software 4 2.1 Installing the FTDI USB Driver 4 2.2 Installing the CPG004_DRV88xx Evaluation Board Windows Application Software 4 2.3 Running the Windows Application Software 4 3 The Windows Application 4 3.1 The Menu 7 3.2 DRV88xx GPIO Control Signals 7 3.3 Updating DAC Output for Current Control (VREFA and VREFB) 8 3.4 DC Motor Speed Control (PWM) 8 4 Schematic 9 List of Figures 1 AVREF Select Jumper Configuration 3 2 DECAY Select Jumper Configuration 3 3 DRV8840 Tab 5 4 DRV8842 Tab 6 5 GPIO Control Signals 7 6 Current Control 8 7 PWM Control 9 1SLVU410–April 2011 CPG005_DRV88xx Evaluation Modules Submit Documentation Feedback Copyright ? 2011, Texas Instruments Incorporated / VM Power DRV88xx Motor Outputs USB Conn USB Chip MSP430 A V R E F D E C A Y Proto Area Where DRV88xx stands for one of DRV8840 or DRV8842 Block Diagram 1 Block Diagram 1.1 Power Connectors The CPG005_DRV88xx Customer EVM offers access to VM (Motor Voltage) power rail via a terminal block (J1). A set of test clips in parallel with the terminal block allows for the monitoring of the input power rail. User must apply VM according to datasheet recommended parameters. NOTE: VDD for logic and microcontroller is derived from USB interface. 1.2 Test Stakes Every pin on the DRV88xx device has been brought out to a test stake. A label on the silkscreen identifies each signal. For those pins that change functionality depending on device flavor, a table is provided with corresponding function name on its particular co