学习进程语句和流程控制语句.pptVIP

情境3 ;构造体结构图;进程语句;进程语句;进程语句;LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY if_case IS PORT ( a, b, c, d : IN Std_Logic; sel : IN Std_Logic_Vector(1 downto 0); y, z : OUT Std_Logic); END if_case; ARCHITECTURE logic OF if_case IS BEGIN if_label: PROCESS(a, b, c, d, sel) BEGIN IF sel=00 THEN y = a; ELSIF sel=01 THEN y = b; ELSIF sel=10 THEN y = c; ELSE y = d; END IF; END PROCESS if_label;;信号敏感表;敏感表举例;敏感表举例;顺序语句;顺序赋值语句举例;D;顺序赋值语句举例;D;顺序赋值语句举例;D;在时序电路中的变量赋值;IF_THEN_ELSE语句 ——流程控制语句（1）;IF 条件句 Then 顺序语句 END IF;IF_THEN_ELSE语句举例;library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; use IEEE.std_logic_unsigned.all; entity counter_4 is port ( clk: in STD_LOGIC; reset: in STD_LOGIC; cen: in STD_LOGIC; load: in STD_LOGIC; dir: in STD_LOGIC; din: in STD_LOGIC_VECTOR (3 downto 0); qout: buffer STD_LOGIC_VECTOR (3 downto 0) ); end counter_4;;architecture behavioral of counter_4 is begin process (clk,reset) begin if reset =1 then qout = “0000”; elsif CLKevent and CLK=1 then if load=1 then qout=din; else if cen=1 then if dir = 1 then; qout = qout +1; else qout = qout - 1; end if; end if; end if; end if; end process; end behavioral;; mux4_1: PROCESS (a,b,c,d,s) BEGIN CASE s IS WHEN 00 = x = a; WHEN 01 = x = b; WHEN 10” = x = c; WHEN OTHERS = x = d; END CASE; END PROCESS mux4_1;;CASE_WHEN语句 ——流程控制语句（2）; CASE语句中每一条件句的选择值只能 出现一次，不能有相同选择值的条件语 句出现。 CASE语句执行中必须选中，且只能选 中所列条件语句中的一条。;;;