JITFPGAIdeas.pptVIP

JIT FPGA Ideas Contributing Ph.D. Students Roman Lysecky (Ph.D. 2005, now Asst. Prof. at Univ. of Arizona Greg Stitt (Ph.D. 2007, now Asst. Prof. at Univ. of Florida, Gainesville Scotty Sirowy (current) David Sheldon (current) Chen Huang (current) SystemC Bytecode for FPGAs Demo FPGA Common Presence Caches, FPUs, GPUs, FPGAs App developers may expect FPGA presence How create/distribute apps that make good use of FPGA if present? “Spatial” Algorithms for FPGAs Example – Count patterns Sequential algorithm Hash table 10s cycles per pattern Bytecode Modern portability approach Java, C# SystemC Bytecode? UCR SystemC Bytecode and Compiler SystemC Bytecode Emulator Dynamic SystemC Accelerator Management Just-in-Time Synthesis Spatial Algorithms for FPGAs Even better spatial algorithm for pattern counting Pipelined binary tree Portable Spatial Applications? Current portable microprocessor binaries – sequential Extensions for threads, processes, ... How support spatial constructs Ports, connections, timing model ..... Transmuting Coprocessors Demo FPGA is a Size-Limited Coprocessing Resource Transmuting Coprocessor Demo Three image filters: Blur filter (S/L): Blur the image Sobel filter (S/L): Find the edge of the image Emboss filter(S/L): Emboss the image Platform: Virtex 2P(XC2VP30): PPC + Coprocessors PPC Frequency: 100Mhz Coproc. Frequency: 50Mhz Demo architecture Image (128*128 pixels and 24bit color): 24 BRAMs Soft version: Read (Image BRAM)?Execution (PPC)?Write (Display BRAM) Coprocessor version: Read (Image BRAM)?Execution(Coproc)?Write (Display BRAM) Dock: send the profile information through UART. Coprocessor configurations Microprocessor only Small blur+ small sobel Small blur + small emboss Small sobel + small emboss Large blur Large sobel Large emboss Choose the configuration according to app profile info. Video demo program flow Frank Vahid, UC Riverside * This research was supported in part by the National Science Foundation, the Semiconductor