Efficient k-Winner-Take-All Competitive Learning Hardware Architecture for On-Chip Learning.docVIP

Efficient k-Winner-Take-All Competitive Learning Hardware Architecture for On-Chip Learning.doc

  1. 1、本文档共23页,可阅读全部内容。
  2. 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
  3. 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载
  4. 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
  5. 5、该文档为VIP文档,如果想要下载,成为VIP会员后,下载免费。
  6. 6、成为VIP后,下载本文档将扣除1次下载权益。下载后,不支持退款、换文档。如有疑问请联系我们
  7. 7、成为VIP后,您将拥有八大权益,权益包括:VIP文档下载权益、阅读免打扰、文档格式转换、高级专利检索、专属身份标志、高级客服、多端互通、版权登记。
  8. 8、VIP文档为合作方或网友上传,每下载1次, 网站将根据用户上传文档的质量评分、类型等,对文档贡献者给予高额补贴、流量扶持。如果你也想贡献VIP文档。上传文档
查看更多
Efficient k-Winner-Take-All Competitive Learning Hardware Architecture for On-Chip Learning

Sensors2012,12,11661-11683;doi:10.3390/s120911661 OPENACCESS sensors ISSN1424-8220 /journal/sensors Article Ef?cientk-Winner-Take-AllCompetitiveLearningHardware ArchitectureforOn-ChipLearning Chien-MinOu 1 ,Hui-YaLi andWen-JyiHwang * 2 2, 1 2 DepartmentofElectronicEngineering,ChingYunUniversity,Jhongli320,Taiwan DepartmentofComputerScienceandInformationEngineering,NationalTaiwanNormalUniversity, Taipei116,Taiwan *Authortowhomcorrespondenceshouldbeaddressed;E-Mail:whwang@.tw; Tel.:+886-2-7734-6670;Fax:+886-2-2932-2378. Received:2July2012;inrevisedform:14August2012/Accepted:15August2012/ Published:27August2012 Abstract: A novel k-winners-take-all (k-WTA) competitive learning (CL) hardware architecture is presented for on-chip learning in this paper. The architecture is based on an ef?cient pipeline allowing k-WTA competition processes associated with different trainingvectorstobeperformedconcurrently. Thepipelinearchitectureemploysanovel codeword swapping scheme so that neurons failing the competition for a training vector are immediately available for the competitions for the subsequent training vectors. The architecture is implemented by the ?eld programmable gate array (FPGA). It is used as a hardware accelerator in a system on programmable chip (SOPC) for realtime on-chip learning. Experimental results show that the SOPC has signi?cantly lower training time thanthatofotherk-WTACLcounterpartsoperatingwithorwithouthardwaresupport. Keywords: recon?gurablecomputing;systemonprogrammablechip;FPGA;competitive learning;k-winners-take-all 1. Introduction Thek-winners-take-all(kWTA)operationisageneralizationofthewinner-take-all(WTA)operation. ThekWTAoperationperformsaselectionofthek competitorswhoseactivationsarelargerthanthe remaining input signals. It has important applications in machine learning [1], neural networks [2], Sensors2012,12 11662 imageprocessing[3],mobilerobotnavigation[4]andothers[5–8].Onedrawbackofk-WTAoperations isthe

您可能关注的文档

文档评论(0)

sheppha + 关注
实名认证
文档贡献者

该用户很懒,什么也没介绍

版权声明书
用户编号:5134022301000003

1亿VIP精品文档

相关文档