DDR_SDRAM_简介.ppt

DDR SDRAM ASIC Course Saeed Bakhshi May 2004 Class presentation based on ISSCC2003 paper: A 1.8V, 700Mb/s/pin, 512Mb DDR-II SDRAM with On-Die Termination and Off-Chip Driver Calibration. Outlines Memory Evolution What is DDR? DDR Architecture High Speed Memory Design Considerations DDR-II Architecture A 1.8V, 700Mb/s/pin, 512Mb DDR-II SDRAM with On-Die Termination and Off-Chip Driver Calibration A paper from: ISSCC 2003; Session 17.8 Samsung Electronics History of Memory Memory Evolution 1979 ? DRAM 1997 ? SDRAM Next Generation Memories ? RAMBUS, DDR SDRAM Only a few years ago, regular SDRAM was introduced as a proposed replacement for the older FPM and EDO asynchronous DRAM technologies. This was due to the limitations the older memory has when working with systems using higher bus speeds (over 75 MHz). In the next couple of years, as system bus speeds increase further, the bell will soon toll on SDRAM itself. One of the proposed new standards to replace SDRAM is Double Data Rate SDRAM or DDR SDRAM. What is DDR? DDR (Double Data Rate) memory is the next generation SDRAM. Like SDRAM, DDR is synchronous with the system clock. The big difference between DDR and SDRAM memory is that DDR reads data on both the rising and falling edges of the clock signal. SDRAM only carries information on the rising edge of a signal. Basically this allows the DDR module to transfer data twice as fast as SDRAM. For example, instead of a data rate of 133MHz, DDR memory transfers data at 266MHz. DDR SDRAM also consumes less power, which makes it ideal for notebook computers. JESD79C is the JEDEC standard for DDR SDRAM specifications. DDR Terminology DDR Architecture The DDR SDRAM uses a double data rate architecture to achieve high speed operation. The double data rate architecture is essentially a 2n prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR SDRAM consists of : Single 2n-b