硬件工程师笔试题（国外英文资料）.docVIP

硬件工程师笔试题（国外英文资料） Hardware engineer written test subjects 2008-09-16 09:44:26 | classification: learn the | label: |. What is the difference between a synchronous circuit and an asynchronous circuit? (shram microelectronics) What is synchronous logic and asynchronous logic? (written by han wang) Synchronous logic is a fixed causal relationship between clocks. What is the line and logic to implement it, and what specific requirements are there on the hardware features? (written by han wang) Line and logic are the two connected to the output signal can be achieved with the function. On the hardware, the oc gate to achieve, because no oc gate may make irrigation current is too large, and burn out logic gate. At the same time in the output port should add a pull-up resistor. What is Setup and Holdup time? (written by han wang) 5, setup and holdup time, difference. (bridge of nanshan) Explain the definition of setup time and hold time and the change when the clock signal is delayed. Explain the setup and hold time problems, draw a picture, and illustrate the solution 2003.11.06 written test question in Shanghai Test chips Setup/hold time is the time between input signal and the clock signal. Build time refers to the clock signal rise along the trigger device before arrival, the data of stable time. Input signal should be clock rising edge ahead such as rising along the effective T time the chip, the T is to set up time - the Setup time. If you dont satisfy the Setup time, the data cant be a clock into the trigger, is only the next clock rise along, data can be scored a trigger. Keep time refers to the clock signal rise along the trigger after arrival, the data of stable time. If the hold time is not enough, the data also can not be into the trigger. Set up Time, Setup Time and Hold Time (Hold Time). The settling Time is to point to in front of the clock edges, data signal needs remain the same Time. Keep Time refers to the clock jump after edge data signals need to keep t