汇编基本指令（国外英文资料）.docVIP

汇编基本指令（国外英文资料） Data transfer instruction MOV: the transfer of notice between registers, the source and the purpose cannot be a segment register at the same time; The code segment register CS is not intended for purpose; The instruction pointer IP is not a source and destination. The immediate number cannot be transferred directly to the segment register. The source and destination operands are the same; In addition to the string operation instructions, the source and destination cannot be the number of memory operations at the same time. XCHG exchange instruction: the operand can be a general-purpose register and a storage unit, but it does not include a segment register or a storage unit at the same time, and no immediate number is available. The LEA 16-bit register memory operator sends valid address instructions: it must be a 16-bit register and memory operand. The LDS 16-bit register memory operation counts 32-bit addresses, its 16-bit offset address is sent to the 16-bit register, and the 16-bit basis values are sent to the DS. LES: in the same way, its just a 16-bit section. Stack operation instruction PUSH operands, operands cannot be counted immediately, POP operands, operands cant be CS and an immediate number Flag operation instruction LAHF: low 8 bits of the marker register, the symbol SF, zero ZF, assist in the incoming AF, the odd even PF, carry the position CF to the position specified by AH. Does not affect the mark bit. SAHF: instead, transfer the marker in AH to the marker register. PUSHF: push the content of the flag register to the top of the stack. POPF: passing a byte on the top of the stack to the flag register. CLC: the carry bit is zero. STC: the carry bit is 1. CMC: the carry bit is reversed. CLD: the direction flag is zero, and in the execution string operation, the address is changed incrementally. STD: DF is 1. CLI: clear interrupts allow the flag IF. The Cpu does not correspond to a blocking interrupt from an external device. STI: IF is