潒栗-CentralProcessingUnitArchitecture.pptVIP

Central Processing Unit Architecture Architecture overview Machine organization von Neumann Speeding up CPU operations multiple registers pipelining superscalar and VLIW CISC vs. RISC Computer Architecture Major components of a computer Central Processing Unit (CPU) memory peripheral devices Architecture is concerned with internal structures of each interconnections speed and width relative speeds of components Want maximum execution speed Balance is often critical issue Computer Architecture (continued) CPU performs arithmetic and logical operations synchronous operation may consider instruction set architecture how machine looks to a programmer detailed hardware design Computer Architecture (continued) Memory stores programs and data organized as bit byte = 8 bits (smallest addressable location) word = 4 bytes (typically; machine dependent) instructions consist of operation codes and addresses Computer Architecture (continued) Numeric data representations integer (exact representation) sign-magnitude 2’s complement negative values change 0 to 1, add 1 floating point (approximate representation) scientific notation: 0.3481 x 106 inherently imprecise IEEE Standard 754-1985 Simple Machine Organization Institute for Advanced Studies machine (1947) “von Neumann machine” ALU performs transfers between memory and I/O devices note two instructions per memory word Simple Machine Organization (continued) ALU does arithmetic and logical comparisons AC = accumulator holds results MQ = memory-quotient holds second portion of long results MBR = memory buffer register holds data while operation executes Simple Machine Organization (continued) Program control determines what computer does based on instruction read from memory MAR = memory address register holds address of memory cell to be read PC = program counter; address of next instruction to be read IR = instruction register holds instruction being executed IBR holds right half of instruction read from memory Simple Machin