FPGA命名规则（FPGA naming rules）.docVIP

FPGA命名规则（FPGA naming rules） The naming conventions for Altera are as follows: Process + version + model +LE quantity + package + device speed. Give an example： EP2C20F484C6 EP process 2C cyclone2 (S stands for stratix. A stands for arria.) 20 2wLE quantity F484 FBGA484pin package C6 eight speed, the smaller the number, the faster the speed. Well, first of all: The amount of LE in the same device signal is more the better. At the same time, the more expensive The number of pins in the same case is as good as possible. The faster the device, the better. FPGA may not be advanced, say: different products, different uses. Cyclone series: a total of 3 generations of cyclone series, is FPGAs A version of the entry products. Covers a wide range, and the corresponding device, regardless of power consumption and speed are good. In small scale design, compete with Xilinxs spartan3A low-end market. Stratix: a total of 4 generations of Stratix direct targeting large scale. High end markets such as digital signal processing and on chip systems. Both device speed and internal resources are entirely new architectures. As for chip systems and internal DSP, stratix4 and high-end Xilinx vertix5 become the mainstream of the top two companies in the high-end market. ALTERA product model designation XXX, XX, XX, X, XX, X, X 1234567 Process + model + LE quantity + package + pin number + temperature range + device speed. 1. prefix: EP typical device EPC composed of EPROM devices EPF, FLEX, 10K or FLFX 6000 series, FLFX 8000 Series EPM MAX5000 series, MAX7000 series, MAX9000 series EPX flash logic device 2. device model 3.LE quantity: XX (k) 4. package form: D ceramic dual in line Q plastic quad flat package P plastic dual in line R Power Quad lead flat package S plastic micro package T thin type J lead chip carrier J ceramic J shape lead chip carrier W ceramic quad lead flat package L plastic J shape lead chip carrier B ball array 5. pin 6. temperature range: C DEG C to 70 DEG c, I -40, fr