北航《数字电路》在线作业一(BUAA digital circuit online homework).docVIP

北航《数字电路》在线作业一(BUAA digital circuit online homework).doc

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北航《数字电路》在线作业一(BUAA digital circuit online homework)

北航《数字电路》在线作业一(BUAA digital circuit online homework) BUAA digital circuit online homework Single question judgment First, radio questions (15 questions, 60 points) 1.8 bit shift register. After serial input, after 8 pulses, all bits are transferred into the register A. 1 B. 2 C. 4 D. 8 Developing options: D 2. to work in the transition region of TTL NAND gate, the input resistor (RI) on the outside. A. RON B. ROFF C., ROFF RI RON D. ROFF Developing options: C In the 3. circuit, an appropriate auxiliary gate circuit is adopted, which is suitable for realizing a single output combinational logic circuit A. parity checker B. data selector C. numerical comparator D. seven segment display decoder Developing options: B 4. logical expression Y=AB can be implemented with () A. is or gate B. is not C. is and gate D. or not Developing options: C 5., the order of variables on the Kano diagram is in the form of (), so that the adjacency can be logically represented by geometric adjacency. A. binary code B. cyclic code C. ASCII code D. decimal code Developing options: B 6. in what input case, the result of non - operations is logical 0 () A. all inputs are 0 B. any input is 0 C. only one input is 0 D. all inputs are 1 Developing options: D 7. a unsigned 10 bit digital input DAC whose output level is a series of A. 4 B. 10 C. 1024 D. 1023 Developing options: C 8. the parameter that does not belong to the rectangular pulse signal is () A. cycle B. duty cycle C. pulse width D. scan period Developing options: D 9.. The international standard model corresponding to the CT4000 series is () A. CT74S Schottky series B. CT74LS low power Schottky series C. CT74L low power series D. CT74H high speed series Developing options: B 10. MOS integrated circuit adopts () control, and its power loss is relatively small A. voltage B. current C. perfusion current D. pull current Developing options: A 11. the following logical circuits are sequential logic circuits that are () A. variable decoder

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