2013年单片机考试试题（In 2013, the single-chip test question）.docVIP

下载本文档

1
0
约1.15万字
约 15页
2017-07-26 发布于河南
举报
版权申诉

2013年单片机考试试题（In 2013, the single-chip test question）.doc

1、本文档共15页，可阅读全部内容。
2、原创力文档（book118）网站文档一经付费（服务费），不意味着购买了该文档的版权，仅供个人/单位学习、研究之用，不得用于商业用途，未经授权，严禁复制、发行、汇编、翻译或者网络传播等，侵权必究。
3、本站所有内容均由合作方或网友上传，本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺！文档内容仅供研究参考，付费前请自行鉴别。如您付费，意味着您自己接受本站规则且自行承担风险，本站不退款、不进行额外附加服务；查看《如何避免下载的几个坑》。如果您已付费下载过本站文档，您可以点击这里二次下载。
4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等，请点击“版权申诉”（推荐），也可以打举报电话：400-050-0827(电话支持时间：9:00-18:30)。
5、该文档为VIP文档，如果想要下载，成为VIP会员后，下载免费。
6、成为VIP后，下载本文档将扣除1次下载权益。下载后，不支持退款、换文档。如有疑问请联系我们。
7、成为VIP后，您将拥有八大权益，权益包括：VIP文档下载权益、阅读免打扰、文档格式转换、高级专利检索、专属身份标志、高级客服、多端互通、版权登记。
8、VIP文档为合作方或网友上传，每下载1次，网站将根据用户上传文档的质量评分、类型等，对文档贡献者给予高额补贴、流量扶持。如果你也想贡献VIP文档。上传文档

2013年单片机考试试题（In 2013, the single-chip test question）

2013年单片机考试试题（In 2013, the single-chip test question） 1. Selection 1. The language of the computer can identify is 2. The reset signal of MCS - 51 microcomputer is () valid.   A high level 3. In the interrupt service routine  should have at least a  . D  interrupt return instructions 4. To be able to use ultraviolet erasing ROM program in read-only memory is called C  EPROM 5. The timer/counter work mode 1 is ().  D  16-bit counter structure 6. If the MCS - 51 interrupt sources are programming for peer  when they apply for interrupt  CPU first response     B 0 int The so-called CPU is the () A 8. In serial port control register SCON  REN  C  is the function of serial port allows the receiving place 9. The main function of McS-51 single-chip reset operation is to initialize the PC to c.0000h 10. The interrupt request marker for external interrupt 1 of MCS - 51 microcontroller is D.I E1 2. Fill in the blanks 1. The computer system bus has the address bus, the control bus and the data bus 2. Accessing 8031 external data storage USES register indirect addressing mode. 3, MCS - 51 with five interrupt source  has two interrupt priority  priority special function register IP will be completed by the software Choose. 4, MCS - 51 have four groups working registers   they address the range is 0 group 07 00 h ~ 1 h group  08 h ~ 0 fh 2 Group of  10 h ~ 17 18 h ~ 1 h 3 groups  fh. 5, a state machine cycle is equal to 6 cycles  oscillation frequency pulse 2 minutes after the body clock signal cycle is defined as a state cycle 6. The interrupt request signal has a level trigger and pulse trigger. 7. The timer/counter working mode of MCS - 51 single chip computer is 16 bit timing/counter. 8, timer/counter 3 refers to the way of working will  counter timer 0 split into two separate 8-bit counter. Another timer/counter is usually used only as a serial port number generator Three  true or false  1 28 h  @ R4  x   MOV    2 INC DPTR )   DEC 3 DPTR