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AN 1200.04 Application Note RF Design （1200.04应用程序注意射频设计）
RF Design Guidelines
AN 1200.04
Application Note
RF Design Guidelines:
PCB Layout and Circuit Optimization
Copyright Semtech 2006 1 of 22
RF Design Guidelines
1 Table of Contents
1 Table of Contents2
1.1 Index of Figures 2
1.2 Index of Tables 2
2 Introduction 3
3 General PCB Layout Techniques 4
3.1 4-Layer Designs4
3.2 2-Layer Designs5
3.3 PCB Transmission Lines 6
3.4 Current Loops and Decoupling7
3.5 PCB Parasitics7
4 RF Device PCB Layout and Optimization9
4.1 Thermal Relief Pad 9
4.2 VCO and Loop Filter 9
4.2.1 PCB Layout 9
4.2.2 Optimization11
4.3 Transmitter Circuit 12
4.3.1 Optimization12
4.3.2 PCB Layout 16
4.4 Receiver LNA Circuit 16
4.4.1 PCB Layout 16
4.4.2 Circuit Optimization 17
5 Passive Components20
5.1 Capacitors20
5.2 Inductors 21
1.1 Index of Figures
Figure 1: Semtech Transceiver Architecture3
Figure 2: 4-Layer PCB Build-Up 4
Figure 3: 2-Layer Reference Design5
Figure 4: PCB Microstrip Trace6
Figure 5: Circuit Decoupling and Current Loop Minimization 7
Figure 6: PCB Via 8
Figure 7: Multiple Via Connection of Thermal Pad 9
Figure 8: VCO Tank Circuit Layout 10
Figure 9: PLL Loop Filter10
Figure 10: Semtech Loop Filter Configurations 11
Figure 11: TX Matching Network 12
Figure 12: Measurement of Optimum Load Impedance Presented to the Transmitter 13
Figure 13: Design of Pi-Section F
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