Avoiding the Solder Void SMTONLINE（避免焊料空虚SMTONLINE）.pdf

® Presented at IPC SMEMA Council APEX 2003 www.GoAPEX.org Avoiding the Solder Void Richard Lathrop Heraeus Inc. Philadelphia, PA Abstract Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper “sandwich” to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed. Introduction Novel Approach Solder voids in solder joints are a common Based on the assumption that the ideal quantitative occurrence in SMT assemblies. Their origins are not void measurement method will utilize BGA analysis well understood but are typically faulted as a failure software and a symmetrical Z-axis reflow structure, of the solder fillet to thoroughly expel flux remnants the “sandwic