Chemical Mechanical Planarization Ron Maltiel, （化学物质平面化,罗恩Maltiel）.pdf

SIMTech Technical Report (PT/01/003/JT) Chemical Mechanical Planarization Dr Wang Zhengfeng Dr Yin Ling Ng Sum Huan Teo Phaik Luan (Joining Technology Group, Process Technology Division, 2001) Chemical Mechanical Planarization PT/01/003/JT 1 BACKGROUND CMP is most widely utilized in back-end IC manufacturing. In these process Chemical Mechanical Planarization (CMP) technology and steps thin layers of metal is a process that can remove topography and dielectric materials are used in the from silicon oxide, metal and polysilicon formation of the electrical interconnections surfaces. It is the preferred planarization between the active components of a step utilized in deep sub-micron IC circuit (e.g. transistors, as formed in the manufacturing. More recent scaling of front-end processing). As shown in figure transistor critical dimension has required 1, the interconnect is manufactured by the use of CMP for applications such as depositing thin films of materials, and shallow trench isolation (STI) and selectively removing or changing the trenched metal interconnection (Cu properties of these materials in certain damascene). CMP has also been utilized areas. A new level of thin film is deposited for fabrication and assembl