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Digital Integrated Circuits A Design Perspective(数字集成电路设计的角度来看)
Digital Integrated
Circuits
A Design Perspective
Designing Combinational
Logic Circuits
Fuyuzhuo
School of Microelectronics,SJTU
Digital IC
Introduction
agenda
• Static CMOS design
• Ratioed logic design___Pseudo NMOS
• Pass transistor design
• Dynamic logic
Digital IC 2
Static CMOS logic
• Static CMOS review
• Static CMOS layout tricky
• Static CMOS VTC data dependency
• CMOS propagate delay definitions
• RC model
• Static CMOS size
• fan-in/fan-out tech.
• Logic effort
• CMOS power analysis
Digital IC 3
Static CMOS Circuit
• At every point in time (except during the switching
transients) each gate output is connected to either
VDD or VSS via a low-resistive path
• The outputs of the gates assume at all times the
value of the Boolean function, implemented by the
circuit (ignoring, once again, the transient effects
during switching periods)
• This is in contrast to the dynamic circuit class,
which relies on temporary storage of signal values
on the capacitance of high impedance circuit
nodes Digital IC 4
VTC is Data-Dependent
3
0.5µ/0.25µ NMOS
A M B M 0.5µ /0.25µ PMOS
3 4
2
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