第14卷第3期.PDFVIP

第 14 卷 第 3 期 太赫兹科学与电子信息学报 Vo1．14，No．3 2016 年 6 月 Journal of Terahertz Science and Electronic Information Technology Jun．，2016 文章编号：2095-4980(2016)03-0474-07 Evaluating logic functionality of cascaded fracturable LUTs a,b a a a,b a a GUO Zhenhong ，LIN Yu ，LI Tianyi ，JIA Rui ，GAO Tongqiang ，YANG Haigang (a.Institute of Electronics；b.University of Chinese Academy of Sciences，Chinese Academy of Sciences，Beijing 100190，China) Abstract：Look Up Tables(LUTs) are the key components of Field-Programmable Gate Arrays(FPGAs). Many LUT architectures have been studied; nevertheless, it is difficult to quantificationally evaluate an LUT based architecture. Traditionally, dedicated efforts on specific modifications to the technology mapping tools are required for LUT architecture evaluation. A more feasible evaluation method for logic functionality is strongly require d for the design of LUT architecture. In this paper, a mathematical method for logic functionality calculation is proposed and conventional and fracturable LUT architectures are analyzed. Furthermore, a cascaded fracturable LUT architecture is presented, which achieves twice logic functionality compared with the conventional LUTs and fracturable LUTs. Key words： Field Programmable Gate Array；cascaded Look Up Tables；functionality evaluation CLC number：TN79 Document code：A doi ：10.11805/TKYDA201603.0474 LUT based FPGAs have been one of the mos