轻量级密码算法LBlock的FPGA优化实现①-计算机系统应用.PDF

计 算 机 系 统 应 用 2015 年 第 24 卷 第 7 期 轻量级密码算法 LBlock 的FPGA 优化实现① 邹 祎, 李 浪, 贺位位, 许琼方 (衡阳师范学院 计算机科学系, 衡阳 421002) 摘 要: LBlock 密码算法是我国学者吴文玲和张蕾在 ACNS2011 提出的轻量级分组加密算法. 论文对 LBlock 加 密算法的硬件优化实现进行了研究, 一方面将相同运算用一个模块设计完成, 通过主程序重复调用完成加密; 另 一方面将轮操作和密钥更新放在同一个模块中并行执行, 而且使用相同寄存器完成 S 盒变换和密钥变换, 这样既 可以不影响加密速度, 又不需要将密钥更新中间结果另存, 有效地节省寄存器的使用开销. 然后分模块进行实现 并仿真实验, 和进行整体正确性实验验证. 通过实验, 验证论文所用优化方法可以较大幅度减少 LBlock 密码算 法的实现面积, slices 占用比减少了 14%, LUT 占用比减少了32%. 在 VIRTEX 5 下的系统吞吐率为 14.53Gb/s, 更 能有效满足较小芯片面积的应用需求, 给当前的物联网加密提供参考. 关键词: LBlock 算法; Verilog HDL; FPGA 实现 Optimal Implementation of Lblock on FPGA ZOU Yi, LI Lang, HE Wei-Wei, XU Qiong-Fang (Department of Computer Science, Hengyang Normal University, Hengyang 421002, China) Abstract: LBlock is a lightweight block cipher designed by Wu Wen-ling and Zhang Lei in ACNS 2011. In this paper, the optimal implementation of LBlock encryption algorithm in hardware is studied. Firstly, the same operation is realized in one module, then the main program calls several times to complete the encryption, especially 32 in Block. Secondly, the same register is used in the subcell and key transformation, the cipher round operation and key update is designed in same module, so that it can release the number of the registers and accelerate the speed of implementation. Last, the sub-modules are combined into a complete program, the correctness of Lblock is tested. It can greatly reduce the area of LBlock algorithm by the optimal method, which can meet the application requirements of smaller chip area and provide reference for the further application of IOT encryption. Key words: LBlock; Verilog HDL; FPGA implementation 近年来, 随着物联网, 无线传感技术的广泛应用, LBlock 密码算法是 32 轮类 Feistel 结构的轻量级 如何将加密算法用尽可能小的面积实现, 同时又要保 分组密码. 设计上仍采用与传统分组密码类似的迭代 证加密效率的问题成