各种电平标准的讨论(ttl,ecl,pecl,lvds,cmos,cml)(Discuss various level standards (TTL, ECL, PECL, LVDS, CMOS, CML)).docVIP
- 1、本文档共20页,可阅读全部内容。
- 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
- 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
- 5、该文档为VIP文档,如果想要下载,成为VIP会员后,下载免费。
- 6、成为VIP后,下载本文档将扣除1次下载权益。下载后,不支持退款、换文档。如有疑问请联系我们。
- 7、成为VIP后,您将拥有八大权益,权益包括:VIP文档下载权益、阅读免打扰、文档格式转换、高级专利检索、专属身份标志、高级客服、多端互通、版权登记。
- 8、VIP文档为合作方或网友上传,每下载1次, 网站将根据用户上传文档的质量评分、类型等,对文档贡献者给予高额补贴、流量扶持。如果你也想贡献VIP文档。上传文档
查看更多
各种电平标准的讨论(ttl,ecl,pecl,lvds,cmos,cml)(Discuss various level standards (TTL, ECL, PECL, LVDS, CMOS, CML))
各种电平标准的讨论(ttl,ecl,pecl,lvds,cmos,cml)(Discuss various level standards (TTL, ECL, PECL, LVDS, CMOS, CML))
The most distinctive feature of ECL circuits is that their basic gate circuits operate in a state of unsaturation, so the maximum of the ECL circuit
The advantage is that the average delay time of this circuit can be up to several nanoseconds or even nanoseconds
Magnitude, which makes the ECL integrated circuit play an unmatched role in high-speed and ultra high-speed digital systems.
The logic swing of the ECL circuit is small (only about 0.8V, while the logic swing of the TTL is about 2.0V)
When the circuit transits from one state to another, the charge and discharge time of the parasitic capacitor will be reduced
ECL circuits have important reasons for high switching speed. But the logic swing is small and the anti-interference ability is disadvantageous.
Since the switch of the unit gate is rotated in turn, there is no cut-off state for the whole circuit
The power consumption of the unit circuit is larger.
From the logic function of the circuit, the ECL integrated circuit has complementary outputs, which means simultaneous gain
There are two logic level outputs, which will greatly simplify the design of logic systems.
The switch of the ECL integrated circuit has a great feedback resistance, and it is the emitter follower output,
Therefore, this circuit has very high input impedance and low output impedance. The emitter follower outputs also have the right logic
Buffer function of signal.
TTL and CMOS circuits are widely used in general electronic device devices. But now the face of increasingly complex systems, the amount of data transmission more and more real-time requirements more and more high, the development trend of the long transmission distance and high speed data transmission, master the logic level of knowledge and design ability is more urgent.
1, several commonly used high-speed logic level
1.1LVDS level
LVDS (Low Voltage Differential Signal), th
您可能关注的文档
- 细菌和微生物之父.ppt
- 细菌代谢产物检测和鉴定.ppt
- 线下工程沉降变形观测和评估方案(细则版).ppt
- 细菌性结膜炎与病毒性结膜炎临床表现和治疗.ppt
- 经典MHCⅠ类基因和其产物.ppt
- 维生素、微量元素和营养药.doc
- 绿色表面活性剂现状和研究进展.doc
- 网版和浆料介绍.doc
- 网络成瘾和矫治.ppt
- 纺织品抗紫外线整理和其应用.doc
- 基于文本挖掘及QFD的红色旅游质量提升路径研究——以赣州红色旅游为例.pdf
- 收入不平衡、共享发展与居民幸福感.pdf
- 非农就业、家庭代际与农户“两闲”盘活利用行为——基于江西省实证.pdf
- “数商兴农”背景下湘西州生产经营型新型职业农民数字技能精准培育路径研究.pdf
- 新质生产力与城乡要素平等交换的双向流动、梯度差异与路径.pdf
- 粮食安全背景下撂荒地治理与村社集体经营秩序重构.pdf
- 新发展格局下我国农业新质生产力发展的推进方略.pdf
- 大食物观赋能高质量发展的内在机理.pdf
- 数字素养何以影响新型农业经营主体可持续创业决策--基于CMES数据的实证分析.pdf
- 读懂2024年中央农村工作会议.pdf
文档评论(0)