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ldo低输出噪声的分析与优化设计 analysis and optimization of a low-noise ldo
第32卷第5期 电子器件 V01.32No.5
OfFJeclxcmD旰i嘲
2009年10月 Chine始J咖l Oct.2009
and ofaLow-NoiseLDO
AnalysisOptimization
Lenian2
ZHUQinweil,TANGPen92,HE
Ning¨,WU
andCommunication.GuilinUniversityofElectronic
,1.CollegeofInformation Technology,GuilinGuangxi541004,China;、
310027,alina /
\2.Imtitu扭ofVLSIDesign,Zh可iangUniversity,Hangzhou
Abstract:ToreducethenoiseofanLDO noiseofanLD0was onthenoisecharac-
chip,the analyzed.Based
methodsof were circuit’S adda
teristics,three noise the
suppressing proposed,i.己tomodify topology,to
filteratthe of referenceandto alow-noise
low-pass outputban·gap design band-gap
the areaand thirdmethodwas to theLDO’S
ing chip power employedoptimize output
consumption,the
noise.Alow-noise was the LDOwasim-
reference to noise
band-gap designedsuppress substantially.The
inTSMC simulated showsthatthe noise
integrated
plemented 0.35弘mprocess.The performance output
from10Hzto100kHz from
range dropped808@to280心.
noise noise
words:IC reference;Thermalnoise;Flicker
Key desig
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