burst-mode asynchronous controllers on fpga触发异步控制器fpga.pdfVIP

Hindawi Publishing Corporation International Journal of Reconfigurable Computing Volume 2008, Article ID 926851, 10 pages doi:10.1155/2008/926851 Research Article Burst-Mode Asynchronous Controllers on FPGA Duarte L. Oliveira,1 Marius Strum,2 and Sandro S. Sato1 1 Electronic Engineering Division, Aeronautics Institute of Technology, Prac¸a Marechal Eduardo Gomes 50, 12228-900 Sao Jose dos Campos, SP, Brazil ˜ ´ 2 Microelectronic Laboratory, Polytechnic School, University of Sao Paulo, Avenida Prof. Luciano Gualberto, Trav 3, ˜ 158, 05508-900 Sao Paulo, SP, Brazil ˜ Correspondence should be addressed to Duarte L. Oliveira, duarte@ita.br Received 5 July 2008; Revised 8 October 2008; Accepted 30 October 2008 Recommended by Gustavo Sutter FPGAs have been mainly used to design synchronous circuits. Asynchronous design on FPGAs is difficult because the resulting circuit may suffer from hazard problems. We propose a method that implements a popular class of asynchronous circuits, known as burst mode, on FPGAs based on look-up table architectures. We present two conditions that, if satisfied, guarantee essential hazard-free implementation on any LUT-based FPGA. By doing that, besides all the intrinsic advantages of asynchronous over synchronous circuits, they also take advantage of the shorter design time and lower cost associated with FPGA designs. Copyright © 2008 Duarte L. Oliveira et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. 1. Introduction