单片机-课程设计-毕业论文-文献综述 论文翻译 正文部分.doc

单片机-课程设计-毕业论文-文献综述 论文翻译 正文部分.doc

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单片机-课程设计-毕业论文-文献综述 论文翻译 正文部分

单片机-课程设计-毕业论文-文献综述+论文翻译+正文部分 P68 8-bit TimerCounter0 with PWM TimerCounter0 is a general purpose single channel 8-bit TimerCounter module The main features are Single Channel Counter Clear Timer on Compare Match Auto Reload Glitch-free Phase Correct Pulse Width Modulator PWM Frequency Generator External Event Counter 10-bit Clock Prescaler Overflow and Compare Match Interrupt Sources TOV0 and OCF0 Overview A simplified block diagram of the 8-bit TimerCounter is shown in Figure 27 For the actual placement of IO pins refer to Pinout ATmega16 on page 2 CPU accessible IO registers including IO bits and IO pins are shown in bold The device-specific IO register and bit locations are listed in the 8-bit TimerCounter Register Description on page 77 Figure 27 8-bit TimerCounter Block Diagram Registers The TimerCounter TCNT0 and Output Compare Register OCR0 are 8-bit registers Interrupt request abbreviated to IntReq in the figure signals are all visible in the Timer Interrupt Flag Register TIFR All interrupts are individually masked with the Timer Interrupt Mask register TIMSK TIFR and TIMSK are not shown in the figure since these registers are shared by other timer units The TimerCounter can be clocked internally via the prescaler or by an external clock source on the T0 pin The Clock Select logic block controls which clock source and edge the TimerCounter uses to increment or decrement its value The TimerCounter is inactive when no clock source is selected The output from the clock select logic is referred to as the timer clock clk T0 The double buffered Output Compare Register OCR0 is compared with the TimerCounter value at all times The result of the compare can be used by the wave- form generator to generate a PWM or variable frequency output on the Output Compare Pin OC0 See Output Compare Unit on page 69 for details The compare match event will also set the compare flag OCF0 which can be used to generate

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