INVITED PAPER LithographyandOther （邀请报告LithographyandOther）.pdfVIP

I N V I T E D P A P E R Lithography and Other Patterning Techniques for Future Electronics As integrated circuits continue to go smaller, laying down circuit patterns on semiconductor material becomes more expensive and new techniques are needed. By R. Fabian Pease, Fellow IEEE , and Stephen Y. Chou, Fellow IEEE ABSTRACT | For all technologies, from flint arrowheads to DNA making and for directly writing on the wafer (also known as microarrays, patterning the functional material is crucial. For Bmaskless lithography[). Going from laboratory demonstra- semiconductor integrated circuits (ICs), it is even more critical tion to manufacturing technology is enormously expensive than for most technologies because enormous benefits accrue (9 $1 billion) and for good reason. Just in terms of data rate to going smaller, notably higher speed and much less energy (mask pattern to resist pattern), today’s exposure tools achieve consumed per computing function. The consensus is that ICs about 10 Tb/s at an allowable error rate of about 1/h; this data will continue to be manufactured until at least the B22 nm node[ rate will double with each generation. In addition, the edge (the linewidth of an equal line-space pattern). Most patterning placement precision required will soon be 30 parts per billion. of ICs takes place on the wafer in two steps: a) lithography, the There are so many opportunities for unacceptable perfor- patterning of a resist film on top of the functional material; and mance that making the right decision goes far beyond under- b) transferring the resist pattern into the functional material, standing the underlying physical principles. But the benefits of usually by etching. Here we concentrate on lithography. Optics continuing to be able to m