用于带数字校正12位40MS_s流水线ADC的MDAC电路及数模接口.pdfVIP

38 5 Vol1 38, No. 5 2008 10 Micr oelectr onics Oct1 2008 12 40 M S/ s ADC M DAC 卫宝跃, 周玉梅, 胡晓宇, 戴 澜 ( , 100029) : 设计了一个用于40 MH 采样率, 12 位精度流水线A/ D 转换器第一 的MDAC 电路 该电路采用高增益带宽积的增益自举放大器, 在3. 5 pF 负载电容下, 可以在8 ns 内稳定在最终值 的0. 01%; 设计了低失调低回踢噪声比较器蒙特卡罗分析表明, 失调电压小于7 mV 电路采 用SM IC 0. 35 Lm/ 3. 3 V CMOS 工艺, 用于 一个带数字校正的流水线A / D 转换器在 MDAC 中 加入 一个D/ A 接口电路, 可以在不引入过多模拟电路的前提下, 配合数字校正部分完成其校正功 能 : MDAC 电路; A/ D 转换器; 数模接口; 增益自举放大器; 数字校正 : T N402 : A : 1004- 3365( 2008) 05-06 14-04 MDACfor 12-Bit 40 MS/ sPipelinedA/ D Converter with Digital Calibration WEI Baoyue, Z H OU y um ei, H U Xiaoy u, DA I Lan (Dept. of A SIC System, I nstitute of Microelectronics, The Chinese A cademy of Sciences, Beij ing 100029, . R. China) Abstract: A n M DA C used for the first stag e of a 40 M S/ s 12-bit pipelined A/ D converter was presented. T he circuit w as constructed w ith a high GBW g ain-bo osted telescopic cascade amplifier, w hich could sett le at 0. 01% in 8 ns. A low-offset and low kickback no ise co mpar ator was designed. Monte Carlo analy sis show ed that the circuit had an offset below 7 mV . Simulated in SM IC. s 0. 35 Lm/ 3. 3 V CM O S pr ocess, the M DA C was used in a pipelined A/ D converter with digital calibr ation. A digita-l to- analog interface w as also designed, w hich could help fulfilling dig ital calibration without intro ducing many additio nal analog circuits. Key words: M DA C; A/ D co nv erter ; Digit a-l to- analog interface; Gain-bo osted amplifier; Dig ital calibr ation EEACC: 1265H; 1280 M DAC ; 1 引 言