AReconfigurableH_省略_PacketProcessing_DUA.pdfVIP

Published online ：2017-10-03 11:24:44 URL ：/kcms/detail/10.1284.TN1124.002.html Chinese Journal of Electronics A Reconfigurable Hardware Architecture for Packet Processing∗ DUAN Tong, LAN Julong, HU Yuxiang and LIU Shiran (National Digital Switching System Engineering Technological Research Center, Zhengzhou 450002, China) Abstract — In this paper, we propose a reconfigurable types of packet processing could be supported at run-time, packet proc