Open short amp; DC测试原理.ppt

Fred Teng/KYEC Lesson1 DC Test Theory Fred Teng/PE Dept. MCP Div/KYEC 2002/5/22 DC Parametric Test Items Test done by precision measure unit (PMU) IDD Leakage Input parameters: VIH, VIL, IIH, IIL Output parameters: VOH, VOL, IOH, IOL Power consumption test: Static, Gross, Dynamic Idd Open/Short Test Open/Short Test Q A Why does device have 2 diodes? Why we test only GND side diode usually? Why we use FIMV mode to test O/S normally? Why we test O/S before any other test items? When you setup a tester, you find a specific DUT which fail at open. How can you find out the root cause? When you setup a tester, you find a specific DUT which fail at short. How can you find out the root cause? Input Leakage Low Test (IIL) Input Leakage High Test (IIH) Output Voltage Test (Voh/Ioh) Output Voltage Test (Vol/Iol) Output Short Circuit Test Static Idd Test Gross Idd Test Dynamic Idd Test * * -100uA -0.65 V PMU force sense force Measure Vss=0 Vdd=0 -100uA Fail Short Pass Fail Open GT –0.2 V LT –1.5 V Procedure Ground all pins ( including VDD) Using PMU force –100 uA, one pin at a time Measure voltage Fail open test if the voltage is less than –1.5 V Fail short test if the voltage is greater than –0.2 V 0 V 0mA PMU force sense force Measure Vss=0 VDDmax Pass Fail IIL LT –10uA Procedure Apply VDDmax Pre-condition all input pins to logic ‘1’ with PE Using PMU force Ground to individual pin Wait for 1 to 5 msec Measure current Fail IIL test if the current is less than –10 uA IIL VLSI PEs force logic 1 On all input pins 5.25V 0.00mA PMU force sense force Measure Vss=0 VDDmax Pass Fail IIH GT 10uA Procedure Apply VDDmax Pre-condition all input pins to logic ‘0’ with PE Using PMU force VDDMAX to individual pin Wait for 1 to 5 msec Measure current Fail IIH test if the current is greater than +10 uA VLSI PEs force logic 0 On all input pins IIH -5.2mA 4.3V PMU force sense force Measure Vss=0 VDDmax Pass Fail VOH LT 2.4V Procedure Apply VDDmax Pre-condition all output pins to logic ‘1’ U