- 1、本文档共92页,可阅读全部内容。
- 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
- 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
IC装备博士生课-史铁林
先进制造技术 半导体制造装备 半导体制造装备概述 芯片制造(前道) 单晶硅拉制、切片、表面处理、光刻、减薄、划片 芯片封装(后道) 测试、 滴胶、Die bonding、Wire bonding、压模 Advantage Fully automatic machines have been developed for volume production. Bonding parameters can be precisely controlled; mechanical properties of wires can be highly reproduced. Bonding speed can reach 100-125 ms per each wire interconnection (two welds and a wire loop). Most reliability problems can be eliminated with properly controlled and much improved tools (capillaries and wedges) and processes. Specific bonding tools and wires can be selected by packaging engineers to meet the requirements. Infrastructure of the technique has been comprised by large wirebonding knowledge, manufacturing people, equipment venders and materials. Flip-Chip Technology Advantages: · Smaller size: Smaller IC footprint (only about 5% of that of packaged IC e.g. quad flat pack), reduced height and weight. · Increased functionality: The use of flip chips allow an increase in the number of I/O. I/O is not limited to the perimeter of the chip as in wire bonding. An area array pad layout enables more signal, power and ground connections in less space. A flip chip can easily handle more than 400 pads. · Improved performance: Short interconnect delivers low inductance, resistance and capacitance, small electrical delays, good high frequency characteristics, thermal path from the back side of the die. · Improved reliability: Epoxy underfill in large chips ensures high reliability. Flip-chips can reduce the number connections per pin from three to one. · Improved thermal capabilities: Because flip chips are not encapsulated, the back side of the chip can be used for efficient cooling. · Low cost: Batch bumping process, cost of bumping decreases, cost reductions in the underfill-process Die Bonding History and applications of wirebonding Wirebonding is the earliest technique of device assembly, whose first result was published by Bell Laboratories in 1957. Sine then, the te
您可能关注的文档
最近下载
- T CFPA012-2022消防用压接式涂覆碳钢管材及管件.pdf VIP
- 社会支持评定量表(SSRS)调查问卷模板.docx VIP
- 综合英语(2)句子翻译.doc
- 无人机农药喷洒服务协议.pdf
- 正确认识和处理科学技术发展与伦理道德关系.doc VIP
- 2608中级财务会计(二)-国家开放大学-2022年1月(2021秋)期末考试真题及标准答案-会计学(会统),金融(金),会计学(财会),会计学(财会试).pdf
- VDA63-2016--过程审核培训教材.pptx
- 中职幼师专业简笔画第八章_教案.doc VIP
- 《手足口病的防控》课件.pptx VIP
- 二年级100以内的脱式加减法练习题及答案(二年级数学计算题100道).pdf
文档评论(0)