微机原理课件ch12章节.ppt

A single 8259A connected in the 8086. * 第*页 * 第*页 Programmed by Initialization (ICWs) and Operation (OCWs) Command Words. There are 4 ICWs. At power-up, ICW1, ICW2 and ICW4 must be sent. If ICW1 indicates cascade mode, then ICW3 must also be sent. ICW1: LTIM indicates if IRQ lines are positive edge-triggered or level-triggered. * 第*页 ICW2: These bits determine the vector numbers used with the IRQ inputs. For example, if programmed to generate vectors 08H-0FH, 08H is placed into these bit positions. ICW3: * 第*页 ICW4: Fully nested mode allows the highest-priority interrupt request from a slave to be recognized by the master while it is processing another interrupt from a slave. AEOI, if 1, indicates that an interrupt automatically resets the interrupt request bit, otherwise OCW2 is consulted for EOI processing. * 第*页 * 第*页 The Operation Command Words (OCWs) are used to direct the operation of the 8259A. OCW1: OCW1 is used to read or set the interrupt mask register. If a bit is set, it will turn off (mask) the corresponding interrupt input. OCW2: Only programmed when the AEOI mode in ICW4 is 0. Allows you to control priorities after each interrupt is processed. * 第*页 OCW2 Non-specific EOI: Here, the ISR sets this bit to indicate EOI. The 8259A automatically determines which interrupt was active and re-enables it and lower priority interrupts. Specific EOI: ISR resets a specific interrupt request given by L2-L0. Rotate commands cause priority to be rotated w.r.t. the current one being processed. Set priority: allows the setting of the lowest priority interrupt (L2-L0). * 第*页 ISR update procedure with rotating priority configured. * 第*页 OCW3 If polling is set, the next read operation will read the poll word. If the leftmost bit is set in the poll word, the rightmost 3 bits indicate the active interrupt request with highest priority. Allows ISR to service highest priority interrupt. There are three status registers, Interrupt Request Re