基于FPGA的交通控制系统的设计.docVIP

摘 要 通过分析现有的几种交通控制模式，讨论几种常用的交通控制系统技术，介绍了利用EDA技术基于FPGA芯片设计制作的交通控制系统，其优势是运行速度快应用灵活功耗ABSTRACT By analyzing several modes of traffic control,discussing several common traffic control system technology, introduces the use of EDA technology which is based on FPGA chip design for the traffic control system.Its advantages is the operational speed, application flexibility and low power consumption . It Only need to modify the FPGA chip program when need to modify the functions of the entire system ,which maximizes the simplified external circuit. This design has several independent modules, each of which supports their work. Master control program FPGA chip runs the whole system,and the counter is to reduce the time. The main and branch trunk controller is to control the main roads by supporting the choice of the counter and signal control, the digital scan control part is to control every bits of each digital distribution. The seven-segment display decoder corresponding digital control digital display; THE signal source is to provide the necessary signal; The 74LS138 decoder is used to strobe the corresponding digital control work, affect each main branch roads and digital control work at the same time ;The hardware peripheral circuits is a direct function of the whole system performance. Keywords: traffic control, EDA, hardware description language, counters, oscillators 目 录 前 言 VI 第一章 交通灯控制技术的现状与发展 1 1.1交通灯控制技术的发展过程 1 1.2我国信号灯产品发展及标准情况 1 1.3我国交通灯控制发展趋势 2 1.4目前我国信号机产品存在主要问题 2 1.5.软硬件结合原理 3 1.6软硬件结合优势 3 第二章 交通灯控制系统设计 3 2.1系统设计的性能指标和系统框图 3 2.1.1性能指标 3 2.1.2系统框图及工作原理 3 2.2硬件设计 5 2.2.1 设计框图 5 2.2.2设计过程 5 2.2.3信号源制作原理图 5 2.2.4电路板制作电路图 6 2.2.5数码管扫描控制电路 7 2.2.6数码管显示部分 7 2.2.7交通灯部分 7 2.2.8信号源部分 7 2.3软件系统设计 8 第三章 单元电路的设计 9 3.1主支干道5进制减计数器电路 9 3.2主支干道20进制减计数器电路 10 3.2.1主支干道20进制减计数器模块图 10 3.2.2基本原理 10 3.2.3源程序 11 3.2.4主支干道20进制减计数器电路仿真图 12 3.3主干道35进制减计数器电路 12 3.3.1主干道35进制减计数器电路模块图 12 3.3.2基本原理 12 3.3.3源程序 12 3.3.4主干道35进制减计数器电路仿真图 13 3.4支干道35进制减计数器电路 14 3.4.1支干道35进制减计数器电路模块图 14 3