数字电路与逻辑设计英文教学.ppt

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * A demultiplexer (DEMUX) performs the opposite function from a MUX. It switches data from one input line to two or more data lines depending on the select inputs. The 74LS138 was introduced previously as a decoder but can also serve as a DEMUX. When connected as a DEMUX, data is applied to one of the enable inputs, and routed to the selected output line depending on the select variables. Note that the outputs are active-LOW as illustrated in the following example… Summary Demultiplexers 74LS138 Data select lines Enable inputs Data outputs Determine the outputs, given the inputs shown. Summary Demultiplexers 74LS138 Data select lines Enable inputs Data outputs A 0 Y 0 Y 1 Y 2 Y 3 Y 4 Y 5 Y 6 Y 7 A 1 A 2 G 1 G 2A G 2B LOW LOW The output logic is opposite to the input because of the active-LOW convention. (Red shows the selected line). Summary Parity Generators/Checkers Parity is an error detection method that uses an extra bit appended to a group of bits to force them to be either odd or even. In even parity, the total number of ones is even; in odd parity the total number of ones is odd. S with odd parity = S with even parity =The ASCII letter S is 1010011. Show the parity bit for the letter S with odd and even parity. Summary Parity Generators/Checkers The 74LS280 can be used to generate a parity bit or to check an incoming data stream for even or odd parity. Checker: The 74LS280 can test codes with up to 9 bits. The even output will normally be HIGH if the data lines have even parity; otherwise it will be LOW. Likewise, the odd output will normally be HIGH if the data lines have odd parity; otherwise it will be LOW. Generator: To generate even parity, the parity bit is taken from the odd parity output. To generate odd parity, the output is taken from the even parity output. 74LS280 Data inputs S Even S Odd Selected Key Terms Full-adder Cascading Ripple carry Look-ahead