socverification-国立中正大学资工系.ppt

SoC Verification (晶片系統驗證) Pao-Ann Hsiung (熊博安) hpa@ .tw/~pahsiung/ 嵌入式系統實驗室 國立中正大學資訊工程學系 Contents Introduction 3 ~ 26 Formal Verification 27 ~ 38 Model Checking 39 ~ 73 Equivalence Checking 74 ~ 83 Verification Tools 84 ~ 86 Verification Example:Industrial Embedded SoC 87 ~ 98 Conclusion Future Work 99 ~ 100 Introduction Introduction Challenges in DSM technology for SoC: Timing Closure Sensitive to interconnect delays Large Capacity Hierarchical design and design reuse Physical Properties Signal integrity (crosstalk, IR drop, power/ground bounce) Design integrity (electron migration, hot electron, wire self-heating) Introduction Introduction Introduction Introduction Verification Options Simulation Technologies Static Technologies Formal Technologies Physical Verification and Analysis Simulation Technologies Event-based Simulators Cycle-based Simulators Transaction-based Simulators Code Coverage HW/SW Co-verification Emulation Systems Rapid Prototyping Systems Hardware Accelerators AMS Simulation Static Technologies Lint Checking Syntactical correctness Identifies simple errors Static Timing Verification Setup, hold, delay timing requirements Challenging: multiple sources Formal Techniques Theorem Proving Techniques Proof-based Not fully automatic Formal Model Checking Model-based Automatic Formal Equivalence Checking Reference design ?? modified design RTL-RTL, RTL-Gate, Gate-Gate implementations No timing verification Physical Verification Analysis Issues for physical verification: Timing Signal Integrity Crosstalk IR drop Electro-migration Power analysis Process antenna effects Phase shift mask Optical proximity correction Comparing Verification Options Comparing HW/SW Coverification Options Which is the fastest option? Event-based simulation Best for asynchronous small designs Cycle-based simulation Best for medium-sized designs Formal verification Best for control-oriented designs Emulation Best for large capacity designs Rapid Prototype Best