Cost Effective Memory Dependence Prediction Using …成本有效的内存的依赖预测中的应用….pptVIP

High Performance Instruction Delivery Soner ?nder Michigan Technological University, Houghton MI /~soner Branch Target Buffers We need to know the branch target address as well as the direction of the branch. We need to supply the branch target before decoding the current instruction! Don’t worry there is a simple way to achieve this. It is called a BTB. Branch Target Buffers Branch Target Buffer - Steps Return Address Predictors Return Address Predictors Return Address Predictors Return Address Predictors Avoid branch prediction by turning branches into conditionally executed instructions: if (x) then A = B op C else NOP If false, then neither store result nor cause exception Expanded ISA of Alpha, MIPS, PowerPC, SPARC have conditional move; PA-RISC can annul any following instr. IA-64: 64 1-bit condition fields selected so conditional execution of any instruction Example: if x y then a=a + 1 else a=a * 2 Example: if x y then a=a + 1 else a=a * 2 Drawbacks to conditional instructions Still takes a clock even if “annulled” Stall if condition evaluated late Complex conditions reduce effectiveness; condition becomes known late in pipeline Dynamic Branch Prediction Summary Branch History Table: 2 bits for loop accuracy Correlation: Recently executed branches correlated with next branch Branch Target Buffer: include branch address prediction Return address predictor: Works well for most procedure calls. Predicated Execution can reduce number of branches as well as number of mispredicted branches. * Procedure foo() { Important stuff return; {It really is jr $31} } for i=1; i 100000; i++) { foo(); } What can you say about the prediction accuracy of BTB for the jr instructions? Procedure foo() { Important stuff return; {It really is jr $31} } for i=1; i 50000; i++) { foo(); foo(); } What can you say about the prediction accuracy of BTB for the jr instructions? Use a stack: call (I.e. jal to a