符合进阶高速汇流排规格的低功率高效能之JPEG2000区块编码.PPT

2004/6/16 Tien-Wei Hsieh A Hardware Accelerator IP for EBCOT Tier-1 Coding in JPEG2000 Standard Tien-Wei Hsieh Youn-Long Lin Department of Computer Science National Tsing Hua University TAIWAN Abstract Proposition 16-bit parallel context generator Stripe-skipping method 3-stage pipelined arithmetic encoder Renormalization strategy with forwarding method Contribution We reduce the cycle count by 17% compared with the best-known design We have achieved 5% within the optimum Outline Introduction Previous work Proposed architecture Experimental results Conclusion Outline Introduction Previous work Proposed architecture Experimental results Conclusion JPEG2000 Image Coding EBCOT Tier-1 Time Consuming EBCOT Tier-1 Block Coding Bit-Plane Division of Code-block Scanning Each Bit-plane 3 Times Coding a Bit-plane Outline Introduction Previous work Proposed architecture Experimental results Conclusion Previous work Context Formation Normal mode NTU: Skipping methods, Sample Skipping (SS) and Group-of-Column Skipping (GOCS) Reduce 60% cycle count compared with straightforward method NCTU: Memory-saving algorithm Reduce 4K bits memory space if the code-block size is 64x64 Pass-parallel mode TKU: Pass-parallel context modeling No cycle wasted 0.1 ~ 0.2 dB image quality degradation Arithmetic Encoder MQ coder (JBIG) Osaka University: 4-stage pipelined architecture Outline Introduction Previous work Proposed architecture Experimental results Conclusion Proposed EBCOT Tier-1 Coder Context Formation Unit Data Dependency for 16 Bits 16-Way Parallel Architecture Memory Scheme Stripe Skipping 3 registers record coding condition of all stripes in 3 passes A stripe is skipped in Pass1 if all bits in the stripe are significant A stripe is skipped in Pass2 if all bits in the stripe are insignificant A stripe is skipped in Pass3 if all bits in the stripe have been coded in Pass1 or 2 Arithmetic Encoder Feedback Loop in AE Flow Chart Proposed Pipelined AE Fast Renormalization Comp