官方说明书ST STLVDS32B 数据手册.pdfVIP

ST STLVDS32B handbook /file/2714338 From ManualL ManualL collects and classifies the global product instrunction manuals to help users access anytime and anywhere, helping users make better use of products. Home: / Chinese: / This Manual: /file/2714338 STLVDS32B High speed differential line receivers Features ■ Meets or exceeds the requirements of ansi TIA/EIA-644 standard ■ Operates with a single 3.3 V supply ■ Designed for signaling rate up to 400 Mbps ■ Differential input thresholds ±100 mV max ■ Typical propagation delay time of 2.5 ns ■ Power dissipation 60 mW typical per receiver at 200 MHz SOP TSSOP ■ Low voltage TTL (LVTTL) logic output levels ■ Pin compatible with the AM26LS32, SN65LVD32 ■ Open circuit fail safe ■ ESD protection: input common mode voltage allows 1 V of ground ■ 7 kV receiver pins potential difference between two LVDS nodes. ■ 3 kV all pins vs gnd The intended application of this device and signalling technique is both point-to-point and Description multidrop data transmission over controlled impedance media approximately 100 Ω. The The STLVDS32 is a differential line receiver that transmission media may be printed circuit board implements the electrical characteristics of low