官方说明书ICSI IS61C632A 32K x 32 SYNCHRONOUS PIPELINED STATIC RAM.pdfVIP

ICSI IS61C632A 32K x 32 SYNCHRONOUS PIPELINED STATIC RAM /file/2626829 From ManualL ManualL collects and classifies the global product instrunction manuals to help users access anytime and anywhere, helping users make better use of products. Home: / Chinese: / This Manual: /file/2626829 IS61C632A IS61C632A 32K x 32 SYNCHRONOUS PIPELINED STATIC RAM FEATURES DESCRIPTION • Fast access time: The ICSI IS61C632A is a high-speed, low-power synchro- – 4 ns-125 MHZ; 5 ns-100 MHz; nous static RAM designed to provide a burstable, high-perfor- mance, secondary cache for the i486™, Pentium™, 680X0™, 6 ns-83 MHz; 7 ns-75 MHz; 8 ns-66 MHz and PowerPC™ microprocessors. It is organized as 32,768 • Internal self-timed write cycle words by 32 bits, fabricated with ICSI s advanced CMOS • Individual Byte Write Control and Global Write technology. The device integrates a 2-bit burst counter, high- • Clock controlled, registered address, data and speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through control registers controlled by a positive-edge-triggered single clock • Pentium™ or linear burst sequence control input. using MODE input • Three chip enab