ARM_Assembly_language_programming汇.ppt

* * ARM Assembly language programming Agenda ARM Data processing instructions ARM Data transfer instructions Arm Control flow instructions Features of Thumb state ARM uses three types of instructions Data processing instructions (arithmetic operations, logical operations, register moves , comparisons, shift operations). Data transfer (register load/store instructions). Control flow instructions (branch instructions). Data processing instructions Rules apply to ARM data processing instructions : - All operands are 32 bit s , come either from registers or aas specified as constants in the instruction itself - The result is also 32 bits and is placed in a register. - 3 operands are used : 2 for inputs and 1 for result. Ex. : ADD r0,r1,r2 ; r0 = r1 + r2 Works for both unsigned and 2’s complement signed numbers. This may produce carry out signal and overflow bits , but ignored by default Result register can be same as an input operand register. Data processing instructions (cont’d) ARM’s basic arithmetic operations : ADD r0,r1,r2 ; r0 = r1 + r2 ADC r0,r1,r2 ; r0 = r1 + r2 +C SUB r0,r1,r2 ; r0 = r1 – r2 SBC r0,r1,r2 ; r0 = r1 – r2 + c + 1 RSB r0,r1,r2 ; r0 = r2 – r2 RSC r0,r1,r2 ; r0 = r2 – r1 + c - 1 RSB stands for reverse subtraction. Operands may be unsigned or 2’s complement integers. ‘C’ is the carry bit in the CPSR Data processing instructions (cont’d) ARM’s bit-wise logical operations : AND r0,r1,r2 ; r0 = r1 and r2 ( bit-by-bit for 32 bits) ORR r0,r1,r2 ; r0 = r1 or r2 EOR r0,r1,r2 ; r0 r1 xor r2 BIC r0,r1,r2 ; r0 = r1 and not r2 BIC stands for ‘bit clear’, where every ‘1’ in the second operand clears the corresponding bit in the first : r1 : 0101 0011 1010 1111 1101 1010 0110 1011 r2 : 1111 1111 1111 1111 0000 0000 0000 0000 r0 : 0000 0000 0000 0000 1101 1010 0110 1011 Data processing instructions (cont’d) ARM’s register move operations : MOV r0,r2 ; r0 = r2 MVN r0,r2 ; r0 = not r2 MV