基于quartusⅡ的通用运算器的设计与实现学士学位论文 理工大学.docVIP

摘 要 在集成电路设计领域中，各类微处理器已经成为了整个芯片系统的核心。运算器作为其核心部件，得到广泛的发展。与此同时，为了增加电子产品产出效率，降低制造成本，诸如Quartus II9.0等电子仿真软件相继出现，为产品开发提供了良好的开发平台。 本文根据运算器具有物美价廉、使用方便、功能性强等特点，分别对半加器、全加器、乘法器、除法器进行了仿真设计。首先本文介绍了课题的背景、意义、发展现状及未来走向，并对研究内容及设计方案进行了简单介绍。其次对设计环境QuartusⅡ平台及VHDL做了介绍。之后对半加器、全加器、乘法器、除法器的设计进行了详细描述，包括工作原理、真值表及流程图，还把乘法器分成各个模块，并对各个模块进行了详细的介绍与设计分析。随后对半加器、全加器、乘法器、除法器进行了编程、仿真以及在QuartusⅡ平台上对仿真结果进行验证。从而做到了从理论到实践，学以致用。 关键词：；QuartusⅡVHDL Abstract In the field of integrated circuit design, all kinds of microprocessors has become the core of the whole chip system. Unit as its core component, is widely development.At the same time, in order to increase the electronic products output efficiency, reduce manufacturing cost, such as the QuartusII 9.0 electronic simulation software appeared, such as for product development provides a good development platform. Based on the arithmetic unit has the good and inexpensive, easy to use, functional characteristics, respectively, half adder, full adder, multiplier and divider design has carried on the simulation. First this article introduces the topic background, significance, status quo and future development, and research contents and the design scheme of a simple introduction. Secondly on the design environment QuartusII platform and VHDL is presented. After full adder and full adder, multiplier and divider design are described in detail, including the working principle, the truth table and flow chart, also the multiplier is divided into various modules, and each module are analyzed in detail and design. Then half adder, full adder, multiplier and divider for programming, simulation, and in the QuartusII platform of simulation results to validate. Thus did it from theory to practice, to practice. Keywords: Arithmetic unit；VHDLQuartusII 目 录 1 引言 1 1.1 课题背景及意义 1 1.2 课题的现状与发展 1 1.3 研究内容与设计方案 1 2 开发环境 3 2.1 Quartus II平台介绍 3 2.1.1 Quartus II简介 3 2.1.2 Quartus II总体设计 4 2.1.3 Quartus II总体仿真 8 2.2 VHDL语言介绍 9 2.2.1 VHDL语言概述 9 2.2.2 VHDL语言介绍 10 2.2.3 V