基于FPGAViterbi译码器.docVIP

毕业设计(论文) 基于FPGA的Viterbi译码器 姓 名： 学 院： 专 业： 班 级： 指 导 教 师： ABSTRACT Convolutional coding has been used in communication systems including deep space communications and wireless communications,which are widely used in satellite communications and wireless communication. The Viterbi algorithm , proposed in 1967 by Viterbi ,is a maximum-likelihood algorithm for convolutional codes. The Viterbi decoder attempts to find the maximum-likelihood function of the decoded code word against received code word. This method is better decoding performance, fast, and relatively simple hardware architecture, is the best convolutional code decoding algorithm. With the continuous development of programmable logic technology, the use of FPGA implementation viterbi decoder design method called mainstream gradually. Therefore, the design viterbi decoder so that it can meet the application requirements of a variety of communication systems, has important practical significance. The main content of this paper is to design a Viterbi decoder with FPGA technology. In-depth study of the viterbi decoding calculation process, focusing on the main functions of each module Viterbi decoder. In this paper, the parallel ACS (add-compare-select) Butterfly algorithm is used to find the survivor path in encoder trellis. We also use trace-back algorithm to dispose the survivor path and receive the decoded results. In addition, the behavior of a design is described in VHDL. The emulated and synthesized results of this design are received by all kinds of EDA tools. Through these results the Viterbi decoder’s correctness and practicability can be validated. Key words：Convolutional ode; Viterbi; Viterbi; FPGA 目 录 绪 论 5 第一章 纠错码的基本原理 7 1.1 差错控制的基本方式 7 1.2 纠错编码的基本原理 9 1.3 纠错编码的分类 11 第二章 卷积码和Viterbi算法 12 2.1 卷积码基础 12 2.1.1 卷积码编码原理 12 2.1.2 卷积码的描述 14 2.2 Viterbi译码原理 18