西电专业英语大作业.docxVIP

科技英语阅读与写作 题 目 FPGA technology for multi-axis control systems学 院 机电工程学院 专 业 控制工程 姓 名 徐 进 学 号 1504122120 Partner 姓 名 学 号 FPGA technology for multi-axis control systems1. IntroductionNowadays the Field-Programmable-Gate-Arrays are big enough to fit a whole digital system in a single device. Those System-on-a-Chips (SoCs) are designed using the core-based approach, interconnecting pre-designed hardware modules (IP cores) using standard on-chip buses. This design flow is valid for ASIC and FPGA design. ①Since the number and diversity of the available IP cores for FPGAs has increased greatly, the industry is adopting the core-based design methodology massively using reconfigurable devices which leads to the appearance of the System-on-Programmable-Chip (SoPC) platforms . ②Apart from the fact that the FPGAs do not incur in non-recurring engineering charges due to their reconfigurable nature, one major benefit of these is the ability to be reconfigured during the execution of the application, even partially. This feature called Run-Time Reconfiguration(RTR) must be able to be integrated into core-based SoPC design flow showing its benefits when applied individually to each core. Some of the benefits of core customization, such as size,power and complexity reduction have already been analyzed by the Department of Electronic and Electrical Engineering of the University of Strathclyde (Glasgow).The research work presented in this article covers the three main advances in this field: IP core, SoPC and CSoPC.③ The next step, covered by the third section,is the CSoPC design where the basic infrastructure to allow dynamic core interchanging using partial reconfiguration will be presented.2. PID IP core implementation④This IP core is responsible for controlling a DC motor position and speed set in internal registers, using the data provided by a motor encoder as well as generating the PWM output. To do so,the system is composed o