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icash中数据页压缩的sopc实现-sopc implementation of data page compression in icash
AbstractSSD(SolidStateDisk)storagetechnologyhasbeendevelopedveryquicklyrecentyears,andhassomestoragemarketoccupancyduetoitshighperformance.However,thereisstillagreatgapbetweenthelifespanandcostofSSDandthoseofHDD(HardwareDiskDrive).Therefore,hybridstoragetechnologywhichcombinesbothSSDandHDDtechnologyandtakeadvantageofeachcharacteristicappears.Byusinghybridstoragetechnology,wecanachievehighperformancewhichisclosetoSSDandlonglifespanandbigcapacitywhichareclosetoHDD.I-CASH(IntelligentlyCoupledArrayofSSDandHDD)isaspecialparallelstructurehybridstorage.I-CASHtakesadvantageofcontentlocality.ItstoresreferencepagedatawhichisnotfrequentlychangedinSSDandstorethedeltadatawhichisfrequentlychangedinHDD.soitcanachieveseveraltimesperformanceofHDD.Otherwise,I-CASHreduceswriteoperationinSSD,sothelifespanofSSDcanbeextended.ThispaperintroducesthestructureofI-CASH,theSOCmaincontrolchipimplementation.Inthisimplementation,maindatacomputingisoperatedbyspecificintegratedcircuitinchip.DuetothecomplexityofthewholeI-CASHsystem,thispaperonlypresentstheresearchaboutthedesignofI-CASHpagecompressionsubsystemandtheimplementationinFPGA.Thestructureofcompressionsubsystemandimplementationofeachmoduleisintroduced,especiallythecoredatacomputingmoduleisintroducedindetail.ThedatacompressionalgorithmanddataformatstoredinHDDisintroduced.ThedesignhasbeenvalidatedinFPGA,thisI-CASHpagecompressionsubsystemcancompletepagedatacompressionanddecompressioncorrectly.Bychangingdifferentreferencepagedataandwritingdata,testsunderdifferentsituationhavebeendone.Thespeedofoperationindatacompressionanddecompressionisabout150MB/s.Keywords:hybridstorage,FieldProgrammableGateArray,SolidStateDisk,IntelligentlyCoupledArrayofSSDandHDD目录摘要1abstractII1绪论1.1课题来源、目的和意义(1)1.2国内外研究现状(2)1.3本文主要研究内容(6)2混合存储原理及其关键技术2.1SSD存储技术(8)2.2并列混合存储技术(9)2.3内容局部性(11)2.4I-CASH存储技术(12)2.5本章小结(14)3I-CASH页压缩硬件平台及其算法3.1硬件平台总体框架(15)3.2各模块功能及其实现方法(16)3.3I-CASH数据页压缩算法(19)3.4本章小结(24)4压缩解压缩模块的设计与实现4.1压缩解压缩模块的结构(25)4.2数据缓冲区buffer(25)4.3数据读写控制器(27)4.4数据计算控制器(29)4.
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