《计算机科学导论》课件Unit 5Computer Components讲解材料.pptVIP

* Hard disk Name Interface Characteristic Application SATA Hard Disk SATA Stronger error correction capability; High data transmission reliability PC SCSI Hard Disk SCSI Wide range of application; Wide bandwidth; Low CPU utility; Hot-plug Minicomputer SAS Hard Disk SAS Fast speed; Fast seed Enterprise-level Storage, Servers, Finance industry Fibre Channel Hard Disk Fibre Channel Hot-plug; Remote connection; Wide bandwidth; Large amount of equipment connections Workstations, servers, mass storage sub-network * 5-2 Components Interconnection CPU/GPU, main memory, and I/O are interconnected in a stand-alone computer, and information needs to be exchanged between them. So, this section will analyze how these three subsystems are interconnected. CPU/GPU and memory connection I/O devices connection * CPU/GPU and memory connection CPU/GPU and memory are connected by three groups of bus【总线】: data bus【数据总线】, address bus【地址总线】, and control bus【控制总线】 (Figure 5.14). Figure 5.14 Connecting CPU/GPU and memory using three buses * CPU/GPU and memory connection (1) Data bus The data bus is made up of several wires, each carrying 1 bit at a time. The size of a word decides the number of wires. If the word is 64 bits (8 bytes) in a computer, you need a data bus with 64 wires. (2) Address bus The address bus permits access to a particular word in memory. The size of address space of memory (that is the CPU’s addressing ability) is determined by the number of wires of address bus. If the address bus carries n bits, the address space of memory is 2n words. * CPU/GPU and memory connection (3) Control bus The control bus handles communication between the CPU/GPU and memory. Control bus is mainly used by CPUs for transmitting control signals and timing signals including read/write signals, chip-select signals, interrupt-response signals【中断响应信号】, byte enable lines, status lines, and so on. If a computer has 2r control actions, you need r wires for the control bus. * 5-1 Three Main