ARM轻松入门教程(北大版)-chapt06.pdfVIP

嵌入式微处理器系统嵌入式微处理器系统 崔光佐 普适计算与应用实验室 北京大学现代教育技术中心 第二篇 ARM微处理器体系机构 第三讲 Thumb指令与三级流水设计 2004.2.21 主要内容 主要内容 nnThumbThumb状态状态 nnThumbThumb指令集指令集 nn 三级流水数三级流水数据通路设计据通路设计 ARMTDMI概念 ARMTDMI概念 nn T:ThumbT:Thumb nn ARMTDMIARMTDMI具有两种指令集具有两种指令集 nn 3232位指令集位指令集 nn 3232位指令位指令，，处理处理3232位数据位数据 nn 性能高性能高 nn 1616位指令集位指令集 nn 1616为指令为指令，，处理处理1616位数据位数据 nn 代码密度高代码密度高 nn 部件延时低部件延时低 ARMTDMI ARMTDMI ARMTDMI ARMTDMI A[31:0] Addresses This is the processor address bus. If ALE (address latch enable) is HIGH and APE (Address Pipeline Enable) is LOW, the addresses become valid during phase 2 of the cycle before the one to which they refer and remain so during phase 1 of the referenced cycle. Their stable period may be controlled by ALE or APE as described below. ABE Address bus enable This is an input signal which, when LOW, puts the address bus drivers into a high impedance state. This signal has a similar effect on the following control signals: MAS[1:0], nRW, LOCK, nOPC and nTRANS . ABE must be tied HIGH when there is no system requirement to turn off the address drivers. ABORT Memory Abort This is an input which allows the memory system to tell the processor that a requested access is not allowed. ARMTDMI ARMTDMI APE Address pipeline enable, this signal enables the address timing pipeline. BIGEND Big Endian configuration.this signal is HIGH ,the processor treats bytes in memory as being in Big Endian format. When it is LOW, memory is tre