一种高性能可扩展公钥密码协处理器的分析与设计-analysis and design of a high performance extensible public key cryptography coprocessor.docxVIP

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一种高性能可扩展公钥密码协处理器的分析与设计-analysis and design of a high performance extensible public key cryptography coprocessor.docx

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一种高性能可扩展公钥密码协处理器的分析与设计-analysis and design of a high performance extensible public key cryptography coprocessor

as the processing width, has the kernel of multiple processing elements pipeline architecture and can support the dual-field modular multiplication of any operand width. A structure of using word as the processing width is introduced in the modular addition and subtraction unit, which avoids the modular reduction in traditional design of modular addition and subtraction circuit. It is also optimized for ECC operations and simplifies the addition and subtraction in ECC. The modular addition and subtraction unit supports modular addition and subtraction of any operand width. The coprocessor has strong capability for parallel computing, which can support parallel binary algorithm and Chinese Residual Theorem for modualr exponentiation and support the scheduling of point operations in ECC for parallel computing. As a result, the operations in RSA and ECC are accelarated effectively.Many design parameters for this coprocessor such as the data path width, the processing element numbers in the Montgomery modualr multiplication unit and the number of modular arithmetic units should be optimized when the coprocessor is designed concretely. The optimization of these parameters should trade off between the area and performance for variey of applications. Based on 0.18μm CMOS process, many coprocessors are designed for different parametes and the design evaluations are made for those designs. Also, a method is proposed for choosing the best parameters. At last, a coprocessor chip is implemented based on one optimized group parameters. The chip can run at the maximum frequency of 250MHz and has the area of 380k gates. The measured results of the chip show that the coprocessor has great performance for accelarating the computing of RSA and ECC, which can perform one 1024bit modular exponentiation only in 232μs using Chinese Residual Theorem and perform one 192bit scalar multiplication only on 242μs for the prime field and perform one 192bit scalar multiplication only in 222μs for