A multiply-add engine with乘法加法引擎.pdf

/scientificreports OPEN A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS received: 30 September 2016 hybrid circuit accepted: 09 January 2017 Published: 14 February 2017 1 1 1 1 2 1 B. Chakrabarti , M. A. Lastras-Montaño , G. Adam , M. Prezioso , B. Hoskins , M. Payvand , 1 1 1 1,3 1 A. Madhavan , A. Ghofrani , L. Theogarajan , K.-T. Cheng D. B. Strukov Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated C