本实验所需备ARM.docVIP

Contents 5. External I/O Control 5-1 5.1. 實驗目的 5-1 5.2. 實驗原理 5-1 5.2.1. About the GPIO unit 5-1 5.2.2. GPIO Overview 5-2 5.2.3. Programmer’s model 5-3 5.3. 引導實驗 5-4 5.3.1. 檔案說明 5-4 5.3.2. 實驗步驟 5-5 5.4. 實驗要求 5-17 5.5. 問題與討論 5-18 5.6. 參考文件 5-18 說明 本實驗所需設備：ARM Integrator AP、CM、LM (Xilinx)、ARM Multi-ICE、麵包版、LED、文字型LCD；本實驗所需軟體：ARM Developer Suite、Xilinx ISE。 本實驗需用到LM中的FPGA。規劃LM的FPGA的方法在另一個實驗「ASIC Logic」中提及，故授課教師可依實際狀況將本實驗安排在「ASIC Logic」實驗之後。 External I/O Control --Using the GPIO Unit to Control the External I/O Devices 實驗目的 In this Lab, you will learn (1) the operation mechanism of a GPIO (General Purpose Input/Output) unit, (2) the method of connecting an external I/O device to the ARM Integrator Platform, and (3) how to employ the GPIO to control the external I/O device. 實驗原理 About the GPIO unit The GPIO (General Purpose Input/Output) unit is an AMBA slave module that connects to the APB. It has 16 bits of programmable input/output organized as two 8-bit ports, port A and port B. Pins of both ports can be configured as either inputs or outputs. The GPIO unit interface with input/output pad cells using a data input, data output and output enable line per pad. Figure 5-1 illustrates the GPIO interfaces, and Figure 5-2 shows the GPIO block diagram. Figure 5-1. GPIO interfaces. Figure 5-2. GPIO block diagram GPIO Overview GPIO provides 16 inputs/outputs organized as two 8-bit groups, port A and port B. The CPU reads and writes data and control/status information to and from GPIO via the AMBA APB interface. Each port has an associated data direction register and a data register. Data direction register The data direction register is 8 bits wide, and is programmed to select whether each individual input/output pin is configured as an input or an output. Data register The data register is 8 bits wide, and is used to read the value input on those GPIO lines that are configured as inputs, and to program the value output on those GPIO line that are configure