uC019___DMA_to_XRAM_on_the_ADuC831__832英文清晰版.pdfVIP

a MicroConverter® Technical Note – uC019 DMA To XRAM on the ADuC831/832 Introduction The on-chip ADC has been designed to run at a maximum conversion When the DMA conversions are completed, the ADC interrupt bit speed of 5 uS (200 kHz sampling rate). When converting at this rate the ADCI is set by hardware and the external SRAM contains the new ADC ADuC831/ADuC832 micro has 5 uS to read the ADC result and store conversion results as shown below. It should be noted that no result is the result in memory for further post processing all within 5 uS written to the last two memory locations. otherwise the next ADC sample could be lost. In an interrupt driven routine the micro would also have to jump to the ADC Interrupt Service 00000AH 1 1 1 1 STOP COMMAND routine which will also increase the time required to store the ADC results. In applications where the ADuC831/ADuC832 cannot sustain NO CONVERSION 0 0 1 1 RESULT W RITTEN HERE the interrupt rate, an ADC DMA mode is provided. CONVERSION RESULT 0 0 1 1