uC001___MicroConverter_I2C_Compatible_Interface英文清晰版.pdfVIP

 MicroConverter Technical Note uC001 MicroConverter 2  I C Compatible Interface 1.0 INTRODUCTION This Technical Note describes the hardware slave and software master implementation of an I2C (inter integrated circuit) compatible interface using the MicroConverter. This technical Note also contains example code showing how a master and a slave can communicate with each other using the MicroConverter I2C compatible interface. The main features of the I2C bus are: • Only two bus lines are required; a serial data line (SDATA) and a serial clock line (SCLOCK). Both of these lines are bi-directional meaning that both the master and the slave can operate as transmitters or as receivers. • An I2C master can communicate with multiple slave devices. Because each slave device has a unique 7-bit address then single master/slave relationships can exist at all times even in a multi slave environment. • Software master can output data at approx 140 kbit/s using a 12MHz clock. Hardware slave can receive clocks (and data) at above 400 kbit/s. • On-Chip filtering rejects 50ns spikes on the SDATA and the SCLOCK lines to preserve data integrity. A typical block diagram of an I2C interface is shown in figure 1 below. 5V Pull-up Pull-up resistor resistor 26 SCLOCK