多码率LDPC码研究及其FPGA实现-通信与信息系统专业论文.docxVIP

万方数据 万方数据 Abstract LDPC codes have found wide applications in modern communications, but the application of single code-rate encoder and decoder is limited by the time variant channels. Multi-rate LDPC code adapts to the changing channel conditions and meets the requirements of future communications, especially multi-rate QC-LDPC code with constant blocklength, can be constructed flexiblely and simplify the complexity of hardware implementation. This thesis mainly studies the construction, performance, and hardware design and implementation of multi-rate QC-LDPC code with constant blocklength, and the main works are as follows: A rate-1/2 QC-LDPC code based on cyclotomic cosets and cyclic permutation matrix is as the mother code, and the subcode with rate-3/4 and rate-5/6 is constructed through row-combining. Performance comparison and analysis with the QC-LDPC codes which is constructed independently is given. The overall design of QC-LDPC encoder supporting three code-rates is presented according to the characteristics of the designed multi-rate LDPC code. The function and timing simulation of the encoder is completed, and the resource consumption and throughput performance is analyzed. The quantization of the decoding algorithm is presented, the memory management program supporting three code-rates is proposed, and the overall design of QC-LDPC decoder supporting three code-rates is presented. The function and timing simulation of the multi-rate decoder is completed, and the performance evaluation is given. Keyword: multi-rate QC-LDPC codes cyclotomic cosets row-combining FPGA encoder and decoder 目录 第一章 绪论..................................................................................................................... 1 1.1 数字通信系统及信道编码发展历程................................................................ 1 HYPERLINK \l _TOC_250013 1.2 多码率 LDPC 码的发展 3 1.3 论文主要研究内容和章节安排........................................................................ 4 HYPERLINK \l _T